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dc.contributor.authorSanchez, Luis-
dc.contributor.authorPatiño, Giancarlo-
dc.contributor.authorMurray, Victor-
dc.date.accessioned2017-11-07T04:10:29Z-
dc.date.available2017-11-07T04:10:29Z-
dc.date.issued2015-02-27-
dc.identifier.urihttp://repositorio.utec.edu.pe/handle/UTEC/32-
dc.descriptionCircuits & Systems (LASCAS), 2015 IEEE 6th Latin American Symposium on. 24-27 Feb. 2015. Montevideo, Uruguay.es_PE
dc.description.abstractWe present the first hardware implementation for a FPGA-based universal link for the transmission of different low-voltage differential signaling (LVDS) connections through a single LVDS connection between different devices. The main objective of this work is to reduce the number of wires in a network, for example in some satellites, with several groups of devices, to a single LVDS connection. This paper proposes a new communication protocol for successfully coding and decoding the data sent through the single connection. We propose a solution for one of the difficulties of LVDS standard due to the amount of wires needed for a duplex connection, significantly reducing the amount of wires required for a large network. The proposed solution has been implemented in an Atlys board with a Spartan 6 FPGA showing promising results.es_PE
dc.formatapplication/pdfes_PE
dc.language.isoenges_PE
dc.publisherIEEEes_PE
dc.rightsinfo:eu-repo/semantics/openAccesses_PE
dc.sourceUniversidad de Ingeniería y Tecnología - UTECes_PE
dc.source.uriRepositorio Institucional UTECes_PE
dc.subjectProtocolses_PE
dc.subjectHardwarees_PE
dc.subjectFrequency division multiplexing,es_PE
dc.subjectOptimization,es_PE
dc.subjectWireses_PE
dc.subjectField programmable gate arrayses_PE
dc.titleHardware implementation of a FPGA-based universal link for LVDS communicationses_PE
dc.typeinfo:eu-repo/semantics/articlees_PE
dc.subject.ocdeIngeniería Eléctrica y Electrónicaes_PE
dc.identifier.doi10.1109/LASCAS.2015.7250480-
dc.relation.urlhttp://ieeexplore.ieee.org/document/7250480/authorses_PE
dc.identifier.journalCircuits & Systems (LASCAS), 2015 IEEE 6th Latin American Symposium ones_PE
dc.description.peer-reviewRevisión por pareses_PE
Aparece en las colecciones: Ingeniería Electrónica

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